Abstract
We present a comprehensive architectural analysis for a proposed fault-tolerant quantum computer based on cat codes concatenated with outer quantum error-correcting codes. For the physical hardware, we propose a system of acoustic resonators coupled to superconducting circuits with a two-dimensional layout. Using estimated physical parameters for the hardware, we perform a detailed error analysis of measurements and gates, including cnot and Toffoli gates. Having built a realistic noise model, we numerically simulate quantum error correction when the outer code is either a repetition code or a thin rectangular surface code. Our next step toward universal fault-tolerant quantum computation is a protocol for fault-tolerant Toffoli magic state preparation that significantly improves upon the fidelity of physical Toffoli gates at very low qubit cost. To achieve even lower overheads, we devise a new magic state distillation protocol for Toffoli states. Combining these results together, we obtain realistic full-resource estimates of the physical error rates and overheads needed to run useful fault-tolerant quantum algorithms. We find that with around 1000 superconducting circuit components, one could construct a fault-tolerant quantum computer that can run circuits, which are currently intractable for classical computers. Hardware with 18 000 superconducting circuit components, in turn, could simulate the Hubbard model in a regime beyond the reach of classical computing.
59 More- Received 21 December 2020
- Revised 3 November 2021
- Accepted 26 January 2022
DOI:https://doi.org/10.1103/PRXQuantum.3.010329
Published by the American Physical Society under the terms of the Creative Commons Attribution 4.0 International license. Further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation, and DOI.
Published by the American Physical Society
Physics Subject Headings (PhySH)
Popular Summary
Building a universal fault-tolerant quantum computer is one of the greatest challenges of the 21st century. In doing so, good qubits along with reliable gates performing all the entangling operations between the qubits is a necessity. Furthermore, fault-tolerant quantum error correction will be required to ensure that all logical qubits and gates acting on the qubits fail with the very low probabilities required by large-scale quantum algorithms. In this paper, we propose a full stack analysis for building a universal fault-tolerant quantum computer and provide a resource cost analysis for implementing quantum algorithms using our architecture. In particular, we propose a quantum-computing architecture built on dissipative cat qubits with the property that one type of error (bit-flip errors) are exponentially suppressed. We then show how such qubits can be realized using acoustic phononic modes coupled to nonlinear elements called asymmetrically threaded superconducting quantum interference devices. We then go on to propose a fault-tolerant architecture with such qubits that does not require long-range gate connectivity and which exploits the noise bias to achieve low hardware requirements for its implementation. In doing so, we propose a new fault-tolerant bottom-up protocol for preparing Toffoli magic states at the physical hardware level. The bottom-up protocol is then combined with a novel top-down magic state distillation scheme to achieve the desired low failure rates required by algorithms. Such Toffoli magic states, along with thin-stripped surface codes for encoding our logical qubits can be used alongside lattice surgery methods to implement a universal gate set. Combining all of the above, we show that with 32 000 superconducting circuit components, the Hubbard model can be simulated in a regime, which is beyond reach by classical computers.