The Cray CX1000 is a family of high-performance computers which is manufactured by Cray Inc., and consists of two individual groups of computer systems. The first group is intended for scale-up symmetric multiprocessing (SMP), and consists of the CX1000-SM and CX1000-SC nodes. The second group is meant for scale-out cluster computing, and consists of the CX1000 Blade Enclosure, and the CX1000-HN, CX1000-C and CX1000-G nodes.
The CX1000 line sits between Cray's entry-level CX-1 Personal Supercomputer range and Cray's high-end XT-series supercomputers.[1]
CX1000 scale-up symmetric multiprocessing nodes
The CX1000-SM and CX1000-SC nodes can be used for cluster computing, but they are designed for scale-up Symmetric Multi-Processing (SMP). When used for cluster computing, the CX1000-SM node is intended to be the master (service) node, although it can instead be a compute node. Similarly, the CX1000-SC node, when used for cluster computing, is intended to be a compute node, but can instead act as the master (service) node. Either or both the CX1000-SC and/or CX1000-SM nodes can be deployed in a HPC cluster. The CX1000-SM and CX1000-SC nodes, when used for SMP, are connected by a cache-coherency interconnect which is a built-in subassembly of the CX1000-SM and CX1000-SC nodes, rather than a standalone device, and is called the Drawer Interconnect Switch in Cray literature. The Drawer Interconnect Switch uses the Intel QuickPath Interconnect technology.
CX1000 scale-out cluster computing nodes
The CX1000 scale-out cluster computing group of systems consists of the CX1000 Blade Enclosure, CX1000-C compute Node, CX1000-G GPU Node and CX1000-HN Management Node. Unlike the CX1000-SM and CX1000-SC nodes, these nodes cannot be used for scale-up SMP, as they were designed without a cache-coherency capability. The CX1000-C and CX1000-G nodes both have blade form factors, and the CX1000-HN node is a rackmount 2U Server. The CX1000-HN is intended to act as the head (service) node in an HPC cluster, with CX1000-C and/or CX1000-G compute nodes.
References
- ^ Morgan, Timothy Prickett (March 23, 2010). "Cray's midrange line big on Xeons, GPUs". The Register. Retrieved September 1, 2010.
External links
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This page was last edited on 4 December 2020, at 05:03