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Publication Date: 1997

Publication Name: IEEE Symposium on Computer Arithmetic

Research Interests:
Residue Number System, Hardware, Decoding, Hardware Implementation of Algorithms, Design and Implementation, and 2 moreAdder and Dynamic Range

An improved VLSI squaring circuit, for a Viterbi algorithm, is designed and implemented in the n-well CMOS 2μm process. It is faster and more area efficient than conventional and table look-up approaches. In addition it compensates for... more

An improved VLSI squaring circuit, for a Viterbi algorithm, is designed and implemented in the n-well CMOS 2μm process. It is faster and more area efficient than conventional and table look-up approaches. In addition it compensates for inaccuracies and noise. The new design is based on combinational logic and the implemented chip reduces the IC area by more than 40%

Publication Date: 1997

Publication Name: Conference Record of the Thirty-First Asilomar Conference on Signals, Systems and Computers (Cat. No.97CB36136)

Research Interests:
Vlsi Design, VLSI, Performance Evaluation, Viterbi algorithm, Chip, and Combinational Circuits

ABSTRACT

Publication Date: 1994

Publication Name: Proceedings of 1994 37th Midwest Symposium on Circuits and Systems

Research Interests:
Vlsi Design, Logic, Microelectronics, Signal Processing, VLSI, and 14 moreTime-Delay Systems, Very Large Scale Integration, Hardware, Real Time Systems, Arithmetic, Real Time, Multiplier, Chip, Alu, Design and Implementation, Adder, Subtractor, Dynamic Range, and Integrated Circuit Design

Publication Date: 1997

Publication Name: Proceedings 13th IEEE Sympsoium on Computer Arithmetic

Research Interests:
Residue Number System, Hardware, Decoding, Hardware Implementation of Algorithms, Design and Implementation, and 2 moreAdder and Dynamic Range

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ABSTRACT

Publication Date: 1996

Publication Name: 38th Midwest Symposium on Circuits and Systems. Proceedings

Research Interests:
Design, Microelectronics, Algorithm, Hardware, Throughput, and 3 moreHardware Implementation of Algorithms, Adders, and Dynamic Range

Page 1. igh-§peed Division Algorithm For Residue Number System Ahmad A. Hiasat and Hoda S. Abdel-Aty-Zohdy, PhD. ... The complexity of these algorithms arises due to utlizing Mixed-Rad= Conversion (MRC) tech-nique, and performing... more

Page 1. igh-§peed Division Algorithm For Residue Number System Ahmad A. Hiasat and Hoda S. Abdel-Aty-Zohdy, PhD. ... The complexity of these algorithms arises due to utlizing Mixed-Rad= Conversion (MRC) tech-nique, and performing difficult residue operations. ...

Publication Date: 1995

Publication Name: Proceedings of ISCAS'95 - International Symposium on Circuits and Systems

Research Interests:
Circuits and Systems, Residue Number System, Computer Simulation, and High Speed

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ABSTRACT The design of Residue Number System (RNS) multipliers has received considerable attention in the last few years. This paper presents a new approach for designing modular multipliers using a combinational logic technique. The idea... more

ABSTRACT The design of Residue Number System (RNS) multipliers has received considerable attention in the last few years. This paper presents a new approach for designing modular multipliers using a combinational logic technique. The idea is based on constructing a truth table whose inputs are the bits of the multiplicand and the multiplier. The outputs are the bits of the modular product. Realizing any minimized Boolean function is achieved using two levels of gates. Compared to most recent developed approach, our new technique requires less integrated circuit area and operates at a higher speed

Publication Date: 1996

Publication Name: Proceedings of the 39th Midwest Symposium on Circuits and Systems

Research Interests:
Vlsi Design, VLSI, Residue Number System, Logic Design, Integrated Circuit, and 4 moreBoolean Functions, Boolean function, Combinational Circuits, and Integrated Circuit Design

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Publication Date: 2001

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Publication Date: 2004

Publication Name: IEE Proceedings - Computers and Digital Techniques

Research Interests:
Set Theory, Algorithm, Residue Number System, Time Complexity, Decoding, and 3 moreDigital Signal Processor, Digital Circuit, and Multiplication

ABSTRACT

Publication Date: 1999

Publication Name: The Computer Journal

Research Interests:
Vlsi Design

Publication Date: 2003

Publication Name: Journal of Systems Architecture

Research Interests:
Residue Number System, Computer Software, Systems Architecture, and Dynamic Range

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... IEEE Transactions on Vehicular Technology 1979; 182203. AUTHORS&#x27; BIOGRAPHIES OmarHasan received his MS and PhD degree in Digital Communications from the New Mexico State University, Las Cruces, New Mexico, in 1990 and 1996,... more

... IEEE Transactions on Vehicular Technology 1979; 182203. AUTHORS&#x27; BIOGRAPHIES OmarHasan received his MS and PhD degree in Digital Communications from the New Mexico State University, Las Cruces, New Mexico, in 1990 and 1996, respectively. ...

Publication Date: 2004

Publication Name: International Journal of Communication Systems

Research Interests:
Distributed Computing, Communication, Communication systems, Rayleigh fading, and Electrical And Electronic Engineering

Publication Date: 2003

Publication Name: Integration, the VLSI Journal

Research Interests:
Signal Processing, Computer Hardware, Comparative Study, Algorithm, Integration, and 5 moreTime Delay, Implementation, Digital Circuit, Boolean function, and Order statistic

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Publication Date: 1999

Publication Name: IEE Proceedings - Vision, Image, and Signal Processing

Research Interests:
Cognitive Science, VLSI, Median Filter, Time Complexity, Breathing, and 2 moreDesign and Implementation and Electrical And Electronic Engineering

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Publication Date: 1998

Publication Name: IEE Proceedings - Circuits, Devices and Systems

Research Interests:
Electrical And Electronic Engineering

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This paper presents a new algorithm which converts moduli (2k , 2k-1, 2k-1-1) residue numbers to their binary equivalents; it is the first converter which has been dedicated to this particular moduli set. The complexity of conversion has... more

This paper presents a new algorithm which converts moduli (2k , 2k-1, 2k-1-1) residue numbers to their binary equivalents; it is the first converter which has been dedicated to this particular moduli set. The complexity of conversion has been greatly reduced using new compact forms for the multiplicative inverses and the properties of modular arithmetic. A hardware implementation which utilizes

Publication Date: 1998

Publication Name: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Research Interests:
Microelectronics, Residue Number System, Hardware, Throughput, Decoding, and 5 moreHardware Implementation of Algorithms, Digital Filters, Adders, Electrical And Electronic Engineering, and Logic circuits

Publication Date: 1999

Publication Name: IEEE Journal of Solid-State Circuits

Research Interests:
Signal Processing, VLSI, Communication System, VERY LARGE SCALE INTEGRATED CIRCUITS, Very Large Scale Integration, and 10 moreViterbi algorithm, Chip, Logic Design, Square function, Integrated Circuit, Electrical And Electronic Engineering, Viterbi Decoding, Combinational Circuits, Integrated Circuit Design, and Convolutional codes

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Ahmad Hiasat

Publication Date: 1997

Publication Name: IEEE Symposium on Computer Arithmetic

Publication Date: 1997

Publication Name: Conference Record of the Thirty-First Asilomar Conference on Signals, Systems and Computers (Cat. No.97CB36136)

Research Interests: Vlsi Design, VLSI, Performance Evaluation, Viterbi algorithm, Chip, and Combinational Circuits<div>()</div>

Publication Date: 1994

Publication Name: Proceedings of 1994 37th Midwest Symposium on Circuits and Systems

Publication Date: 1997

Publication Name: Proceedings 13th IEEE Sympsoium on Computer Arithmetic

Publication Date: 1996

Publication Name: 38th Midwest Symposium on Circuits and Systems. Proceedings

Publication Date: 1995

Publication Name: Proceedings of ISCAS'95 - International Symposium on Circuits and Systems

Research Interests: Circuits and Systems, Residue Number System, Computer Simulation, and High Speed<div>()</div>

Publication Date: 1996

Publication Name: Proceedings of the 39th Midwest Symposium on Circuits and Systems

Publication Date: 2001

Publication Date: 2004

Publication Name: IEE Proceedings - Computers and Digital Techniques

Publication Date: 1999

Publication Name: The Computer Journal

Research Interests: Vlsi Design<div>()</div>

Publication Date: 2003

Publication Name: Journal of Systems Architecture

Research Interests: Residue Number System, Computer Software, Systems Architecture, and Dynamic Range<div>()</div>

Publication Date: 2004

Publication Name: International Journal of Communication Systems

Research Interests: Distributed Computing, Communication, Communication systems, Rayleigh fading, and Electrical And Electronic Engineering<div>()</div>

Publication Date: 2003

Publication Name: Integration, the VLSI Journal

Publication Date: 1999

Publication Name: IEE Proceedings - Vision, Image, and Signal Processing

Publication Date: 1998

Publication Name: IEE Proceedings - Circuits, Devices and Systems

Research Interests: Electrical And Electronic Engineering<div>()</div>

Publication Date: 1998

Publication Name: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Publication Date: 1999

Publication Name: IEEE Journal of Solid-State Circuits

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Research Interests:
Vlsi Design, VLSI, Performance Evaluation, Viterbi algorithm, Chip, and Combinational Circuits

Research Interests:
Circuits and Systems, Residue Number System, Computer Simulation, and High Speed

Research Interests:
Vlsi Design

Research Interests:
Residue Number System, Computer Software, Systems Architecture, and Dynamic Range

Research Interests:
Distributed Computing, Communication, Communication systems, Rayleigh fading, and Electrical And Electronic Engineering

Research Interests:
Electrical And Electronic Engineering