“I worked for Matt both at UofA and Ozark IC. Matt is a passionate leader. He cares about both people and his product. He never asks someone to do something that he wouldn't be willing to do himself. During my time at Ozark IC, Matt (and Jim) provided a foundation, and then let us design as far and as fast as we could. Matt also provides astute feedback, and listens carefully to the feedback of others. I have benefited greatly from my time working with and for Matt, and I hope I have the opportunity to work with him again in the future.”
Matt Francis
Fayetteville, Arkansas, United States
1K followers
500+ connections
About
Entrepreneur, passionate about technology, education and everything in…
Activity
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it's been a fantastic workshop, and even better company! IEEE hosts over 2000 conferences a year, and I can't wait to share what we've learned this…
it's been a fantastic workshop, and even better company! IEEE hosts over 2000 conferences a year, and I can't wait to share what we've learned this…
Shared by Matt Francis
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We’re requesting info & ideas for fundamental breakthroughs to enable high-power, direct conversion from #nuclearenergy into electricity by…
We’re requesting info & ideas for fundamental breakthroughs to enable high-power, direct conversion from #nuclearenergy into electricity by…
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Thanks to Brianne Tengan for a wonderful welcome from the IEEE Hawaii Section for attendees of #IEEEConvene. It's great to see colleagues and share…
Thanks to Brianne Tengan for a wonderful welcome from the IEEE Hawaii Section for attendees of #IEEEConvene. It's great to see colleagues and share…
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Experience
Education
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University of Arkansas at Fayetteville
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Activities and Societies: IEEE, TBP, HKN
Dissertation Title: Radiation Vulnerability Analysis Using High Efficiency Compact Modeling.
Developed a technique for modeling and simulating charge sharing upsets in deep sub-micron processes using a SPICE-like simulator. -
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Activities and Societies: IEEE, HKN (President)
Obtained MSEE as part of direct PhD program at the UA under the Walton Distinguished Fellowship.
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Activities and Societies: HKN, IEEE, TBP
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Activities and Societies: IEEE, HKN, Marching Band, TBP
Active in undergraduate research starting after Sophomore year, including the development of advanced CAD tools for behavioral modeling. Recognized as a "Razorback Classic" (one of 5 UA seniors of significance) for achievements in and out of the classroom. Team member of a Arkansas Governor's Award for Entrepreneurial Development business plan team that placed 2nd place in the 2003 competition.
Volunteer Experience
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Ozark Section Executive Committee Member Region 5
IEEE
- Present 8 years 8 months
Science and Technology
2016-2018 - Section Chair
2019 - present - Webmaster -
Board Member, Secretary
Elkins Community Network
- Present 3 years 4 months
Social Services
Co-founder, board member and secretary of the Elkins Community Network, a 501c3 community organization that connects and empowers citizens of Elkins, AR and the surrounding area.
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Region 5 Executive Committee Member
IEEE
- Present 6 years 7 months
Science and Technology
2022-2023: Director Elect, Vice Chair Region 5 (USA Southwest)
2018-2021 - East Area Chair - Helping IEEE members and leaders in Arkansas, Louisiana and Eastern Texas reach their technical, professional and volunteer goals. -
MGA Committees
IEEE
- Present 4 years 8 months
Education
Member, Geographical Unit Operations Committee (2020-2021)
Member, Nominations and Appointments Committee (2022-) -
Committee Member
IEEE-USA
- Present 5 years
Science and Technology
Member, Entrepreneurship Policy Innovation Committee (EPIC)
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Secretary
IEEE Ozark Computer Society
- Present 2 years
Education
Co-founder of the Ozark Computer Society Chapter
Publications
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Complex High-Temperature CMOS Silicon Carbide Digital Circuit Designs
IEEE Transactions on Device and Materials Reliability
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An 8-bit DAC at 400 C
Wide Bandgap Power Devices and Applications (WiPDA), 2015 IEEE 3rd Workshop
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This paper presents the first operational digital to analog converter at 400°C. The 8 bit R-2R ladder DAC was designed in the Raytheon 1.2 μm CMOS HiTSiC process. The data converter is also the first of its kind in SiC. It has been tested with a supply voltage between 12 V and 15 V, and reference voltages of 5 V to 8 V. At 400°C, the maximum measured differential non linearity (DNL) is 2 LSB (least significant bit) and the integral non linearity is…
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This paper presents the first operational digital to analog converter at 400°C. The 8 bit R-2R ladder DAC was designed in the Raytheon 1.2 μm CMOS HiTSiC process. The data converter is also the first of its kind in SiC. It has been tested with a supply voltage between 12 V and 15 V, and reference voltages of 5 V to 8 V. At 400°C, the maximum measured differential non linearity (DNL) is 2 LSB (least significant bit) and the integral non linearity is 4.4 LSB.Other authorsSee publication -
A high temperature comparator in CMOS SiC
Wide Bandgap Power Devices and Applications (WiPDA), 2015 IEEE 3rd Workshop
This paper demonstrates the first reported high temperature voltage comparator in
CMOS silicon carbide. The comparator was designed in a 1.2 µm CMOS SiC process and
has been tested for a voltage supply of 12 V to 15 V. The rail to rail voltage comparator has
been tested up to 450 C with rise and fall times of 31 ns and 22 ns respectively, and positive
and negative propagation delays of 108 ns and 107 ns respectively. Keywords—
comparator, silicon carbide, high temperature…This paper demonstrates the first reported high temperature voltage comparator in
CMOS silicon carbide. The comparator was designed in a 1.2 µm CMOS SiC process and
has been tested for a voltage supply of 12 V to 15 V. The rail to rail voltage comparator has
been tested up to 450 C with rise and fall times of 31 ns and 22 ns respectively, and positive
and negative propagation delays of 108 ns and 107 ns respectively. Keywords—
comparator, silicon carbide, high temperature electronics, wide bandgap ICs.Other authorsSee publication -
A family of CMOS analog and mixed signal circuits in SiC for high temperature electronics
IEEE Aerospace Conference, 2015
This paper describes the simulation and test results of a family of analog and mixed signal circuits in silicon carbide CMOS technology at temperatures of 300°C and above. As SiC and wide bandgap devices in general grow in popularity for efficient and stable operation in high temperature and harsh environment applications, CMOS SiC integrated circuits can open up a new frontier of opportunity for miniaturization and system dependability. The building block circuits presented here can serve as…
This paper describes the simulation and test results of a family of analog and mixed signal circuits in silicon carbide CMOS technology at temperatures of 300°C and above. As SiC and wide bandgap devices in general grow in popularity for efficient and stable operation in high temperature and harsh environment applications, CMOS SiC integrated circuits can open up a new frontier of opportunity for miniaturization and system dependability. The building block circuits presented here can serve as the basis of rugged SiC system-on-chips for extreme environment applications.
Other authorsSee publication -
A family of CMOS analog and mixed signal circuits in SiC for high temperature electronics
IEEE Aerospace Conference, 2015
This paper describes the simulation and test results of a family of analog and mixed signal circuits in silicon carbide CMOS technology at temperatures of 300°C and above. As SiC and wide bandgap devices in general grow in popularity for efficient and stable operation in high temperature and harsh environment applications, CMOS SiC integrated circuits can open up a new frontier of opportunity for miniaturization and system dependability. The building block circuits presented here can serve as…
This paper describes the simulation and test results of a family of analog and mixed signal circuits in silicon carbide CMOS technology at temperatures of 300°C and above. As SiC and wide bandgap devices in general grow in popularity for efficient and stable operation in high temperature and harsh environment applications, CMOS SiC integrated circuits can open up a new frontier of opportunity for miniaturization and system dependability. The building block circuits presented here can serve as the basis of rugged SiC system-on-chips for extreme environment applications.
Other authorsSee publication -
Towards Standard Component Parts in SiC-CMOS
2015 IEEE Aerospace Conference
A series of “standard” parts for use in extreme environments based on high-temperature silicon carbide complimentary logic is presented. High temperature results and statistical samples are used to demonstrate the maturity of the parts for extreme environment applications.
Other authorsSee publication -
Analyzing the Radiation Hardness of an NCL Library
Aerospace Conference, 2015 IEEE
Abstract-An asynchronous NULL Convention Logic (NCL) gate library is developed for
applications in space environment with temperatures ranging from-196 C to 125 C with
radiation exposure. To further improve radiation-immunity and temperature-stability dual
high-density metal-insulator metal (DMIM) capacitor-based delay elements (using the IBM 90nm SiGe - 9HP process) were created.Other authorsSee publication -
A UVLO Circuit in SiC Compatible with Power MOSFET Integration
IEEE Journal of Emerging and Selected Topics in Power Electronics
The design and test of the first undervoltage lock-out circuit implemented in a low voltage 4H silicon carbide process capable of single-chip integration with power MOSFETs is presented. The lock-out circuit, a block of the protection circuitry of a single-chip gate driver topology designed for use in a plug-in hybrid vehicle charger, was demonstrated to have rise/fall times compatible with a MOSFET switching speed of 250 kHz while operating over the targeted operating temperature range between…
The design and test of the first undervoltage lock-out circuit implemented in a low voltage 4H silicon carbide process capable of single-chip integration with power MOSFETs is presented. The lock-out circuit, a block of the protection circuitry of a single-chip gate driver topology designed for use in a plug-in hybrid vehicle charger, was demonstrated to have rise/fall times compatible with a MOSFET switching speed of 250 kHz while operating over the targeted operating temperature range between 0 °C and 200 °C. Captured data shows the circuit to be functional over a temperature range from -55 °C to 300 °C. The design of the circuit and test results is presented.
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A 4H Silicon Carbide Gate Buffer for Integrated Power Systems
IEEE Transactions on Power Electronics; Volume: 29; Issue: 2
A gate buffer fabricated in a 2 um 4H silicon carbide process is presented. The circuit is composed of an input buffer stage with a push-pull output stage, and is fabricated using enhancement mode N-channel FETs in a process optimized for SiC power switching devices. Simulation and measurement results of the fabricated gate buffer are presented and compared for operation at various voltage supply levels, with a capacitive load of 2 nF. Details of the design including layout specifics…
A gate buffer fabricated in a 2 um 4H silicon carbide process is presented. The circuit is composed of an input buffer stage with a push-pull output stage, and is fabricated using enhancement mode N-channel FETs in a process optimized for SiC power switching devices. Simulation and measurement results of the fabricated gate buffer are presented and compared for operation at various voltage supply levels, with a capacitive load of 2 nF. Details of the design including layout specifics, simulation results, and directions for future improvement of this buffer are presented. In addition, plans for its incorporation into an isolated high-side/low-side gate-driver architecture, fully integrated with power switching devices in a SiC process, are briefly discussed. This letter represents the first reported MOSFET-based gate buffer fabricated in 4H SiC.
Other authorsSee publication -
Multi-objective layout optimization for Multi-Chip Power Modules considering electrical parasitics and thermal performance
2013 IEEE 14th Workshop on Control and Modeling for Power Electronics (COMPEL)
Multi-Chip Power Modules (MCPMs) allow for integration of high power semiconductor devices and control circuitry into one compact package which yields improved reliability and reduced size, cost, and complexity. The layout design process of an MCPM is time consuming and very multidisciplinary, spanning thermal, electrical, and mechanical issues. A software tool is introduced in this paper which allows for a user to draw a `stick figure' of a desired MCPM layout which is transformed into a…
Multi-Chip Power Modules (MCPMs) allow for integration of high power semiconductor devices and control circuitry into one compact package which yields improved reliability and reduced size, cost, and complexity. The layout design process of an MCPM is time consuming and very multidisciplinary, spanning thermal, electrical, and mechanical issues. A software tool is introduced in this paper which allows for a user to draw a `stick figure' of a desired MCPM layout which is transformed into a multi-objective optimization problem by the tool. After optimization, a user can browse a set of results which form a trade-off curve of approximately Pareto optimal thermal and electrical parasitic layout performance.
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A Robust, Wide-Temperature Data Transmission System for Space Environments
2013 IEEE Aerospace Conference
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A bias-dependent single-event compact model implemented into BSIM4 and a 90 nm CMOS process design kit
IEEE Transactions on Nuclear Science
A single-event model capable of capturing bias-dependent effects has been
developed and integrated into the BSIM4 transistor model and a 90 nm CMOS process
design kit. Simulation comparisons with mixed mode TCAD are presentedOther authorsSee publication -
Significance of strike model in circuit-level prediction of charge sharing upsets
IEEE Transactions on Nuclear Science
Single Event Transients (SETs), the choice of strike model is shown to have a notable effect
upon observed upsets. A method utilizing distributed charges to model strikes to adjacent
devices is illustrated and utilized to compare the effect of strike kernel models in such
Charge Sharing SETS (CSSETS). Bias-dependent models are shown to more accurately
predict expected physical observations and Technology Computer Aided Design (TCAD)
simulation, especially when such…Single Event Transients (SETs), the choice of strike model is shown to have a notable effect
upon observed upsets. A method utilizing distributed charges to model strikes to adjacent
devices is illustrated and utilized to compare the effect of strike kernel models in such
Charge Sharing SETS (CSSETS). Bias-dependent models are shown to more accurately
predict expected physical observations and Technology Computer Aided Design (TCAD)
simulation, especially when such charge-sharing upsets must be consideredOther authorsSee publication
Honors & Awards
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Outstanding Individual Achievement - IEEE Region 5
IEEE Region 5
Recognized for development of programs for members of IEEE in Northwest Arkansas in 2017. Community outreach events, including first Electric Car Rally, Elkins High School Robotics Club and helping coordinate Arkansas - Tunisia - Columbia outreach efforts with the U of A GEARS program within IEEE Ozark Section.
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Early Career Award
University of Arkansas College of Engineering
The Early Career Award recognizes exceptional professional and personal achievements of recent College of Engineering graduates
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Senior Member, IEEE
IEEE
Recognized for 10 years of significant contributions to electrical engineering profession as a Senior Member of IEEE.
Organizations
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IEEE
Senior Member (2016), Ozark Section Chair (2016), Region 5
- Present
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